In the semiconductor process, integrated circuits are fabricated on a semiconductor wafer. The semiconductor wafer goes through many processing steps before a plurality of integrated circuits are separated by cutting the semiconductor wafer. The processing steps may include lithography, etching, doping and depositing different materials.
Etching is a processing step by which one or several layers can be removed from a wafer. There are two types of etching: wet etching and dry etching. Wet etching is an etching process that utilizes liquid chemicals to remove materials on top of a wafer. On the other hand, dry etching is an etching process that uses either plasma or reactive gases to remove materials from the wafer. Generally, a semiconductor wafer may go through many etching steps before the etching process is complete. Such etching steps include nitride etch, poly etch, spacer etch, contact etch, via etch, metal etch, and the like.
Post etch residue is a major defect in an etching process. An etch island resulted from a partially etched layer may cause quality issues. For example, a blocked etch metal island may cause a short between two neighboring metal structures. Further complicating this problem may be the trend of maximizing the number of dies produced by a wafer. In order to maximize productivity, the physical size of a semiconductor die is further reduced so that a wafer can accommodate more semiconductor dies. However, a die-size shrink may cause two neighboring metal structures in a semiconductor die much closer. Accordingly, a relatively large etch residue such as a blocked etch metal island has a high possibility of causing a short between two metal structures adjacent to the blocked etch metal island.
One typical method for avoiding the short between two neighboring structures is based upon an adjustment of two neighboring structures' width. One example is a seal ring structure that is employed to reduce the stress induced during a wafer sawing process. In order to prevent etching induced defects such as a partially etched residue, the width of the seal ring is reduced. However, a seal ring having a narrow structure may not protect integrated circuits from the lateral stress induced during a wafer sawing process.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the various embodiments and are not necessarily drawn to scale.